Senior Mixed-Signal IC Engineer

A new UK semiconductor design venture, backed by major industry and government partners, building serious chip design capability from the ground up. The work sits across low-power intelligent hardware, edge AI, and advanced analogue and mixed-signal systems, with real commercial products at the end of it rather than isolated research.

Company mission: build critical semiconductor design capability in the UK.

Role Overview

Lead the design of high-performance analogue and mixed-signal IC blocks, with a heavy focus on high-speed data converters and the surrounding signal chain. Senior technical role, working at architectural and transistor level, guiding layout, supporting bring-up, and mentoring engineers while staying close to the detail.

What You'll Own

Design

• High-speed core ADC and DAC blocks at architectural and transistor level
• Serial data interface paths and mixed-signal signal-chain circuitry
• Supporting blocks: PLLs, delta-sigma ADCs, wide-band amplifiers, low-voltage data serialisers, bandgaps, bias circuits, and LDOs
• Advanced bulk and SOI CMOS technologies, including nodes down to 22nm and beyond

Simulation and Optimisation

• Switched-capacitor design, transient-noise analysis, and linearity optimisation
• Tuning and calibration schemes for mixed-signal blocks
• Behavioural modelling where it earns its keep

Layout, Bring-Up and Debug

• Technical direction for sensitive analogue, high-speed, and matching-critical layout
• Chip bring-up, lab characterisation, and performance analysis
• Design reviews, mentoring, and lifting the mixed-signal standard across the team
• Clear documentation of design choices, simulation results, and risks

What We're Looking For

Essential

• Master's in electronics engineering, or equivalent working experience
• 10+ years as an analogue circuit engineer in a commercial setting
• Proven high-resolution, high-speed ADC design work, taken through to silicon
• Strong grasp of switched-capacitor circuits, transient noise, and linearity optimisation
• Practical experience tuning and calibrating mixed-signal blocks
• Lab characterisation and debug experience on mixed-signal parts
• Worked in technologies down to 22nm CMOS and beyond
• Solid understanding of high-speed layout and matching
• Track record leading analogue and mixed-signal design teams

Useful

• Time-interleaved ADC experience
• SystemVerilog, real-number modelling, and Verilog-A
• Cadence mixed-signal design flows
• Mentoring junior engineers
• Comfortable working across analogue IC, digital, layout, test, and systems boundaries

Get in touch for a confidential conversation: Imogen@waverecruitment.co.uk